Apollo Testbed

We research three major areas in low power design of VLSI circuits and systems: software and system level power prediction and optimization, architectural/behavioral power estimation and optimization, and system-level dynamic power management.

We investigate the problem of simultaneous scheduling and mapping of the computational and communication processes in a generalized task flow graph to HW/SW resources on a VLSI chip so as to minimize the energy dissipation while satisfying a given deadline and/or throughput constraint. As part of this research we examine the problem of modeling energy-latency characteristics of a given application program (for example, specified in a standard programming language such as C/C++) which is to be mapped to custom hardware and/or run on an embedded processor. We develop efficient, yet accurate, estimators at this high-level of design abstraction without having to do detailed compilation of the application program into the hardware and/or software components. This capability is in turn essential in achieving effective power-aware hardware/software co-design. At the same time we develop optimization techniques for power-conscious compiler targeting the StrongARM microprocessor. We research a number of problems related to power analysis and optimization at the behavioral/architectural level. In particular, we address early power estimation for combinational and sequential logic blocks. Examples include power estimation of a finite state machine circuit prior to state encoding, or of a combinational logic circuit before logic synthesis and mapping. We also develop power characterization of Intellectual Property (IP) cores at the architectural level and develop an automatic clock-gating tool for HDL descriptions. We consider dynamic power management techniques, which exploit the idleness of system components, and study the problem of determining optimal management policies for a variety of system models. In particular, we focus on operating system (OS) directed control policies and seek to develop realistic models of the hardware and software components and the system environment.

The key research results include development of prototype software programs that perform power prediction of C/C++ and HDL descriptions of complex applications and systems, provide system-level component modeling and characterization for power, and optimize the application software (C/C++ or HDL) and the system software (OS) to achieve low power dissipation.