Optimal Design of Power Delivery Network for System on Chip

Partial support from the National Science Foundation

Project Summary: Utilizing multiple voltage domains (also known as voltage island) is one of the most effective techniques to minimize the overall power dissipation – both dynamic and leakage – while meeting a performance constraint. In a system designed with multiple voltage domains, the power delivery network (PDN) is responsible for delivering power with appropriate voltage levels to different functional blocks (FB’s) on the chip. Voltage regulator modules (VRM’s) which are in charge of voltage conversion and regulation are inevitable components in this network. The selection of appropriate VRM’s plays a critical role in the power efficiency of the PDN.

Design of an Efficient Power Delivery Network in an SoC to Enable Dynamic Power Management In an ISLPED-07 paper, we introduced a new technique to design the power delivery network for a SoC design to support dynamic voltage scaling. In this technique the power delivery network is composed of two layers. In the first layer, DC-DC converters with fixed output voltages are used to generate all voltage levels that are needed by different loads in the SoC design. In the second layer of the power delivery network, a power switch network is used to dynamically connect the power supply terminals each load to the appropriate DC-DC converter output in the first layer. Experimental results demonstrate the efficacy of this technique.

Optimal Selection of Voltage Regulator Modules in a Power Delivery Network — Typically a star configuration of the VRM’s, where only one VRM resides between the power supply and each FB, is used to deliver currents with appropriate voltage levels to different loads in the circuit. In a DAC-07 paper, we showed that using a tree topology of suitably chosen VRM’s between the power source and FB’s yields higher power efficiency in the PDN. We formulated and efficiently solved the problem of selecting the best set of VRM’s in a tree topology as a dynamic program and efficiently solve it.