Deeply scaled FinFET devices are the optimal choice for low power applications based on their specific characteristics over conventional MOSFET devices. However, these devices are very sensitive to process variation and exhibit non-linear timing and power behavior. Due impact of several number of variation parameters, it is not-practical for the conventional industrial characterization process (e.g. using LUTs) to capture this non-linear behavior. We used neural networks for capturing non-linear timing behavior of deeply-scaled circuits.Related work:
- M. S. Abrishami, H. Ge, J. F. Calderon, M. Pedram and S. Nazarian,“NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework,” in ISQED, Santa Clara, CA, USA, 2020,