| Time | Team Members | Talk Title |
|---|---|---|
| 2:00-2:20 |
Sanjana Dhiran Jove Rodrigues Shwetha Vijayakumar |
Bayesian Optimization for Memory Management of Manycore Systems |
| 2:30-2:50 |
Qian Wang Yi Deng Muhao Guo |
A Graph Neural Network Based Recommendation System |
| 3:00-3:20 |
Xuejing Tan Zhen Gong Huayue Hua |
Intelligent Content Delivery Network Design and Optimization |
| 3:30-3:50 |
Shahid Mohammed Yingzhu Liu Xuan Zuo |
Deep Reinforcement Learning Based Resource Provisioning and Task Scheduling for Cloud Service Providers |
| 4:00-4:20 |
Sharon Ladron de Guevara Gepei Lu Santiago Zapata |
A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers |
| 4:30-4:50 |
Han Zhang Yang Shen Jiaming Li |
An Intelligent Platform for Digital System Testing |
| 5:00-5:20 |
Ting Yu Wenxin Ye Ruiqi Cao |
Verification Environment Design - A Verilator, UVM-SystemC Based Approach |
| 5:30-5:50 |
Sufyan Shaikh Sharon Guo Sam Maracich |
A Secure ISA Architecture for Side Channel Power Analysis Attacks |
| 6:00-6:20 |
Ryan Afranji Yani Jin Xinyi Cai |
A NoSQL Database and Content Delivery Network for Video Delivery Systems |
| 6:30-6:50 |
Andrew DeMartino Sudheendra Chennupati Shalini Haldar Varun Vishnumurthy |
A Secure ISA Architecture for Cryptographic Applications |
| 7:00-7:20 |
Junyao Zhang Junru Wang Muyi Feng |
Intelligent Autonomous Intersection Management |
| 7:30-7:50 |
Hsu Cheng Zhiyu Chen Harmanpreet Singh Kalsi |
Learning Based Statistical Static Timing Analysis |
| 8:00-8:20 |
Yasaswy Jandhyala Ruchir Mathur Sumukh Athrey |
Accelerated BNN Based Image Processing in SFQ Technologies |
| 8:30-8:50 |
Sachi Malkan Aditya Prateek Nalini Sharma |
System Verilog Based Modeling and Logic Verification of SFQ Circuits |
| 9:00-9:20 |
Kruthika Ravi Vennela Nekkanti Shashannk Shivashankar |
A Secure ISA Architecture for Cache Attacks |