Conference Publications

  1. S. Chen, Y. Wang, and M. Pedram, “Optimal Offloading Control for a Mobile Device Based on a Realistic Battery Model and Semi-Markov Decision Process,” To appear in Proc. of the Int’l Conf. on Computer Aided Design, Nov. 2014.
  2. X. Lin, Y. Wang, P. Bogdan, N. Chang, and M. Pedram, “Reinforcement Learning Based Power Management for Hybrid Electric Vehicles,” To appear in Proc. of the Int’l Conf. on Computer Aided Design, Nov. 2014.
  3. M. Ghasemi-Gol, Y. Wang, and M. Pedram, “An optimization framework for the data centers to simultaneously minimize energy cost under day-ahead dynamic energy prices and provide regulation services,” Proc. of the Int’l Green Computing Conference, Nov. 2014.
  4. Q. Xie, M. J. Dousti, and M. Pedram, “Generating accurate component and device skin temperature maps in smartphones,” To appear in Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2014.
  5. S. Yue, L. Chen, D. Zhu, T. M. Pinkston, and M. Pedram, “Smart butterfly: reducing static power dissipation of network-on-chip with core-state-awareness,” To appear in Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2014.
  6. J. Kim, Y. Wang, N. Chang, and M. Pedram, “Fast photovoltaic array reconfiguration for partial solar powered vehicles,” To appear in Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2014.
  7. W. Lee, Y. Wang, T. Cui, S. Nazarian, and M. Pedram, “Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon,” To appear in Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2014.
  8. Q. Xie, X. Lin, Y. Wang, M. J. Dousti, A. Shafaei, M. Ghasemi-Gol, and M. Pedram, “5nm FinFET standard cell library optimization and circuit synthesis in near- and super-threshold voltage regimes,” To appear in Proc. of the IEEE Computer Society Annual Symposium on VLSI, July 2014.
  9. A. Shafaei, Y. Wang, X. Lin, and M. Pedram, “FinCACTI: Architectural analysis and modeling of caches with deeply-scaled FinFET devices,” To appear in Proc. of the IEEE Computer Society Annual Symposium on VLSI, July 2014.
  10. S. Chen, M. Ghorbani, Y. Wang, P. Bogdan, and M. Pedram, “Trace-based analysis and prediction of cloud computing user behavior using the fractal modeling technique,” To appear in Proc. of the IEEE Conference on Big Data, Jun. 2014.
  11. X. Lin, Y. Wang, Q. Xie, and M. Pedram, “An energy and performance-aware task scheduling framework in the mobile cloud computing environment,” To appear in Proc. of the IEEE Cloud, Jun. 2014.
  12. S. Yue, D. Zhu, Y. Wang, and M. Pedram, “Distributed Load Demand Scheduling in Smart Grid to Minimize Electricity Generation Cost,” To appear in Proc. of IEEE PES Society General Meeting, Jul. 2014.
  13. Y. Wang, S. Yue, and M. Pedram, “State-of-health (SoH) aware optimal control of plug-in electric vehicles,” To appear in Proc. of IEEE PES Society General Meeting, Jul. 2014.
  14. T. Cui, Y. Wang, S. Nazarian, and M. Pedram, “An Electricity Trade Model for Multiple Power Distribution Networks in Smart Energy Systems,” To appear in Proc. of IEEE PES Society General Meeting, Jul. 2014.
  15. X. Lin, Y. Wang, N. Chang, and M. Pedram, “Optimal switch configuration design for reconfigurable photovoltaic modules,” To appear in Proc. of IEEE PES Society General Meeting, Jul. 2014.
  16. M. J. Dousti and M. Pedram, “Power-Aware Deployment and Control of Forced-Convection and Thermoelectric Coolers,” To appear in Proc. of Design Automation Conference, Jun. 2014.
  17. Y. Wang, Y. Zhang, M. Rahimi, and M. Pedram, “Life-Cycle Inventory and Energy Analysis of FinFET Integrated Circuits,” Proc. of the Int’ Symposium on Sustainable Systems and Technologies, May 2014.
  18. Y. Fu, Y. Wang, X. Lin, S. Nazarian, and M. Pedram, “Energy Optimal Sizing of FinFET Standard Cells Operating in Multiple Voltage Regimes Using Adaptive Independent Gate Control,” Proc. of ACM Great Lakes Symposium on VLSI, May 2014.
  19. Y. Wang, X. Lin, and M. Pedram, “Optimal Power Switch Design for Fine-grained Ultra Dynamic Voltage Scaling with Limited Number of Power Rails,” Proc. of ACM Great Lakes Symposium on VLSI, May 2014.
  20. M. J. Dousti, A. Shafaei, and M. Pedram, “Squash: A Scalable Quantum Mapper Considering Ancilla Sharing,” Proc. of ACM Great Lakes Symposium on VLSI, May 2014.
  21. D. Zhu, S. Yue, L. Chen, T. Pinkston, and M. Pedram. “Balancing On-Chip Network Latency in Multi-Application Mapping for Chip-Multiprocessors,” Proc. of Int’l Parallel & Distributed Processing Symposium, May 2014.
  22. T. Cui, Y. Wang, X. Lin, S. Nazarian, and M. Pedram, “A Probability Theory Based Price Determination Framework for Utility Companies in an Oligopolistic Energy Market,” Proc. of IEEE Green Technologies Conference, Apr. 2014.
  23. Y. Wang, X. Lin, and M. Pedram, “A Game Theoretic Framework of SLA-Based Resource Allocation for Competitive Cloud Service Providers,” Proc. of IEEE Green Technologies Conference, Apr. 2014.
  24. X. Lin, Y. Wang, and M. Pedram, “Designing the Optimal Pricing Policy for Aggregators in Smart Grid,” Proc. of IEEE Green Technologies Conference, Apr. 2014.
  25. T. Cui, S. Chen, Y. Wang, S. Nazarian, and M. Pedram. “An Efficient Semi-Analytical Current Source Model for FinFET Devices in Near/Sub-Threshold Regime Considering Multiple Input Switching and Stack Effect,” Proc. of Int’l Symposium on Quality Electronic Design, Mar. 2014.
  26. X. Lin, Y. Wang, and M. Pedram. “Stack Sizing Analysis and Optimization for FinFET Logic Cells and Circuits Operating in the Sub/Near-Threshold Regime,” Proc. of Int’l Symposium on Quality Electronic Design, Mar. 2014.
  27. X. Lin, Y. Wang, S. Nazarian, and M. Pedram. “An Improved Logical Effort Model and Its Application to Optimal Sizing of Circuits Operating in Multiple Supply Voltage Regimes,” Proc. of Int’l Symposium on Quality Electronic Design, Mar. 2014.
  28. S. Chen, Y. Wang, and M. Pedram. “Concurrent placement, capacity provisioning, and request flow control for a distributed cloud infrastructure,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  29. Y. Gao, S. Gupta, Y. Wang, and M. Pedram. “An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  30. M. Kamal, A. Ghasemazar, A. Afzali-Kusha, and M. Pedram. “Improving Efficiency of Extensible Processors by Using Approximate Custom Instructions,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  31. K. Kim, D. Shin, Q. Xie, Y. Wang, M. Pedram, and N. Chang, “FEPMA: Fine-grained event-driven power meter for Android smartphones based on device driver layer event monitoring,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  32. W. Lee, Y. Wang, and M. Pedram. “VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  33. Y. Wang, X. Lin, Q. Xie, N. Chang, and M. Pedram. “Minimizing state-of-health degradation in hybrid electrical energy storage systems with arbitrary source and load profiles,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  34. D. Zhu, L. Chen, S. Yue, and M. Pedram. “Application mapping for express channel-based networks-on-chip,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  35. D. Zhu, Y. Wang, N. Chang, and M. Pedram. “Optimal design and management of a smart residential PV and energy storage system,” Proc. of Design Automation and Test in Europe, Mar. 2014.
  36. Y. Wang, X. Lin, and M. Pedram. “Coordination of the smart grid and distributed data centers: a nested game-based optimization framework,” Proc. of IEEE PES Innovative Smart Grid Technologies Conference, Feb. 2014.
  37. T. Cui, Y. Wang, S. Nazarian, and M. Pedram. “An electricity trade model for microgrid communities in smart grid,” Proc. of IEEE PES Innovative Smart Grid Technologies Conference, Feb. 2014.
  38. M. Triki, Y. Wang, A. C. Ammari, and M. Pedram. “Reinforcement Learning Algorithms for Dynamic Power Management,” Proc. of World Symposium on Computer Applications & Research, Jan. 2014.
  39. A. Shafaei, M. Saeedi, and M. Pedram. “Qubit Placement to Minimize the Communication Overhead in Circuits Mapped to 2D Quantum Architectures,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2014.
  40. T. Cui, Y. Wang, X. Lin, S. Nazarian, and M. Pedram. “Semi-analytical current source modeling for FinFET devices in multiple voltage regimes with independent gate control and process variations,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2014.
  41. S. Chen, Y. Wang, and M. Pedram. “A Semi-Markovian Decision Process Based Control Method for Offloading Tasks from Mobile Devices to the Cloud,” IEEE Global Communications Conf., Dec. 2013.
  42. M. Triki, Y. Wang, A.C. Ammari, and M. Pedram. “Reinforcement learning-based dynamic power management of a battery powered system supporting multiple active modes,” Proc. of European Modeling Symposium, Nov. 2013.
  43. X. Lin, Y. Wang, and M. Pedram “An Optimal Control Policy in a Mobile Cloud Computing System Based on Stochastic Data,” Proc. of the IEEE Cloud Networking, Nov. 2013.
  44. Q. Xie, J-M. Kim, Y. Wang, N. Chang, and M. Pedram. “Dynamic Thermal Management in Mobile Devices Considering the Thermal Coupling between Battery and Application Processor,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2013.
  45. X. Lin, Y. Wang, and M. Pedram. “Joint Sizing and Adaptive Independent Gate Control for FinFET Circuits Operating in Multiple Voltage Regimes Using the Logical Effort Method,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2013.
  46. Q. Xie, T. Cui, Y. Wang, S. Nazarian, and M. Pedram. “Semi-Analytical Current Source Modeling of Near-Threshold Operating Logic Cells Considering Process Variations,” Proc. of the Int’l Conf. on Computer Design, Oct. 2013.
  47. Y. Li, Y. Wang, S. Nazarain, and M. Pedram. “A Nested Game-Based Optimization Framework for Electricity Retailers in the Smart Grid with Residential Users and PEVs,” Proc. of the IEEE Online Conf. on Green Communications, Oct. 2013.
  48. Y. Gao, Y. Wang, S-K. Gupta, and M. Pedram. “An Energy and Deadline Aware Resource Provisioning, Scheduling and Optimization Framework for Cloud Systems,” Proc. of the Int’l Conference on Hardware/Software Codesign and System Synthesis, Sep. 2013.
  49. D. Zhu, S. Yue, Y. Wang, N. Chang, and M. Pedram. “Designing a Residential Hybrid Electrical Energy Storage System Based on the Energy Buffering Strategy,” Proc. of the Int’l Conference on Hardware/Software Codesign and System Synthesis, Sep. 2013.
  50. H. Goudarzi and M. Pedram. “Force-directed Geographical Load Balancing and Scheduling for Batch Jobs in Distributed Datacenters,” Proc. of the IEEE Cluster, Sep. 2013.
  51. X. Lin, Y. Wang, S. Yue, N. Chang, and M. Pedram. “A Framework of Concurrent Task Scheduling and Dynamic Voltage and Frequency Scaling in Real-Time Embedded Systems with Energy Harvesting,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Sep. 2013.
  52. S. Yue, D. Zhu, Y. Wang, N. Chang, and M. Pedram. “SIMES: A Simulator for Hybrid Electrical Energy Storage Systems,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Sep. 2013.
  53. S-Y. Park, Y. Wang, N. Chang, and M. Pedram. “Maximum Power Transfer Tracking in a Solar USB Charger for Smartphones,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Sep. 2013.
  54. M.J. Dousti and M. Pedram. “Platform-Dependent, Leakage-Aware Control of the Driving Current of Embedded Thermoelectric Coolers,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Sep. 2013.
  55. M. Saeedi, A. Shafaei, and M. Pedram. “Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures,” Proc. of the 5th Conference on Reversible Computation, Jul. 2013.
  56. Y. Wang, X. Lin, and M. Pedram. “A Bayesian Game Formulation of Power Dissipation and Response Time Minimization in a Mobile Cloud Computing System,” Proc. of IEEE 2nd Int’l Conference on Mobile Services, Jun. 2013.
  57. H. Goudarzi and M. Pedram. “Geographical Load Balancing for Online Service Applications in Distributed Datacenters,” Proc. of the IEEE Cloud, Jun. 2013.
  58. I. Hwang and M. Pedram. “Hierarchical Virtual Machine Consolidation in a Cloud Computing System,” Proc. of the IEEE Cloud, Jun. 2013.
  59. A. Shafaei, Mehdi Saeedi, and Massoud Pedram. “Optimization of Quantum Circuits for Interaction Distance in Linear Nearest Neighbor Architectures,” Proc. of the 50th Design Automation Conf., Jun. 2013.
  60. M.J. Dousti and M. Pedram. “LEQA: Latency Estimation for a Quantum Algorithm Mapped to a Quantum Circuit Fabric,” Proc. of the 50th Design Automation Conf., Jun. 2013.
  61. Q. Xie, Y. Wang, and M. Pedram. “Variability-Aware Design of Energy-Delay Optimal Linear Pipelines Operating in the Near-Threshold Regime and Above,” Proc. of Great Lakes Symposium on VLSI, May 2013.
  62. Y. Wang, S. Chen, and M. Pedram. “Service level agreement-based joint application environment assignment and resource allocation in cloud computing systems,” Proc. of IEEE Green Technologies Conference, Apr. 2013.
  63. Y. Wang, X. Lin, and M. Pedram. “Accurate component model based optimal control for energy storage systems in households with photovoltaic modules,” Proc. of IEEE Green Technologies Conference, Apr. 2013.
  64. V. Akhlaghi, M. Kamal, A. Afzali-Kusha, and M. Pedram. “An Efficient Network on-Chip Architecture Based on Isolating Local and non-Local Communications,” Proc. of Design Automation and Test in Europe, Mar. 2013.
  65. A. Shafaei Bajestan, M. Saeedi, and M. Pedram. “Reversible Logic Synthesis of k-Input, m-Output Lookup Tables,” Proc. of Design Automation and Test in Europe, Mar. 2013.
  66. Q. Xie, S. Yue, D. Shin, N. Chang, and M. Pedram. “Adaptive Thermal Management for Portable System Batteries by Forced Convection Cooling,” Proc. of Design Automation and Test in Europe, Mar. 2013.
  67. Y. Wang, X. Lin, S. Park, N. Chang, and M. Pedram. “Optimal Control of a Grid-Connected Hybrid Electrical Energy Storage System for Homes,” Proc. of Design Automation and Test in Europe, Mar. 2013.
  68. Y. Wang, X. Lin, J. Kim, N. Chang, and M. Pedram. “Capital Cost-Aware Design and Partial Shading-Aware Architecture Optimization of a Reconfigurable Photovoltaic System,” Proc. of Design Automation and Test in Europe, Mar. 2013.
  69. Y. Wang, S. Chen, Hadi Goudarzi, and M. Pedram. “Resource allocation and consolidation in a multi-core server cluster using a Markov decision process model,” Proc. of the Int’l Symposium on Quality Electronic Design, Mar. 2013.
  70. Y. Wang, M. Triki, X. Lin, A. Ammari, and M. Pedram. “Hierarchical dynamic power management using model-free reinforcement learning,” Proc. of Int’l Symposium on Quality Electronic Design, Mar. 2013.
  71. Y. Wang, X. Lin, and M. Pedram. “A nested two stage game-based optimization framework in mobile cloud computing system,” Proc. of IEEE Int’l Symposium on Service-Oriented System Engineering, Mar. 2013.
  72. T. Cui, Y. Wang, S. Yue, S. Nazarian, and M. Pedram. “A Game-Theoretic Price Determination Algorithm for Utility Companies Serving a Community in Smart Grid,” Proc. of IEEE PES Innovative Smart Grid Technologies Conference, Feb. 2013.
  73. Y. Wang, X. Lin, and M. Pedram. “A sequential game perspective and optimization of the smart grid with distributed data centers,” Proc. of IEEE PES Innovative Smart Grid Technologies Conference, Feb. 2013.
  74. D. Zhu, Y. Wang, S. Yue, Q. Xie, M. Pedram, and N. Chang. “Maximizing Return on Investment of a Grid-Connected Hybrid Electrical Energy Storage System,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2013.
  75. D. Shin, N. Chang, W. Lee, Y. Wang, Q. Xie, and M. Pedram. “Online Estimation of the Remaining Energy Capacity in Mobile Systems Considering System-Wide Power Consumption and Battery Characteristics,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2013.
  76. Q. Xie, D. Zhu, Y. Wang, M. Pedram. Y. Kim, and N. Chang “An Efficient Scheduling Algorithm for Multiple Charge Migration Tasks in Hybrid Electrical Energy Storage Systems,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2013.
  77. D. Shin, K. Kim, N. Chang, and M. Pedram. “Battery cell configuration for organic light emitting diode display in modern smartphones and tablet-PCs,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2012.
  78. X. Lin, Y. Wang, N. Chang, and M. Pedram. “Online Fault Detection and Tolerance for Photovoltaic Energy Harvesting Systems,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2012.
  79. M. Ghasemazar, H. Goudarzi, and M. Pedram. “Robust Optimization of a Chip Multiprocessor’s Performance under Power and Thermal Constraints,” Proc. of the Int’l Conf. on Computer Design, Oct. 2012.
  80. M. Kamal, Q. Xie, M. Pedram. A. Afzali-Kusha, and S. Safari. “An Efficient Reliability Simulation Flow for Evaluating the Hot Carrier Injection Effect in CMOS VLSI Circuits,” Proc. of the Int’l Conf. on Computer Design, Oct. 2012 (Best Paper Award).
  81. S. Yue, D. Zhu, Y. Wang and M. Pedram. “Reinforcement Learning Based Dynamic Power Management with a Hybrid Power Supply,” Proc. of the Int’l Conf. on Computer Design, Oct. 2012.
  82. T. Cui, Y. Wang, H. Goudarzi, S. Nazarian, and M. Pedram. “Profit Maximization for Utility Companies in an Oligopolistic Energy Market with Dynamic Prices,” IEEE Online Conference on Green Communications, 2012.
  83. M. Triki, Y. Wang, A. C. Ammari, and M. Pedram. “Dynamic Power Management of a Computer with self power-managed components,” Proc. of PATMOS, 2012.
  84. S. Park, Y. Wang, Y. Kim, N. Chang, and M. Pedram. “Battery Management for Grid-connected Photovoltaic Power Generation Systems,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Jul. 2012.
  85. Y. Wang, X. Lin, N. Chang, and M. Pedram. “Dynamic Reconfiguration of Photovoltaic Energy Harvesting System in Hybrid Electric Vehicles,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Jul. 2012.
  86. I. Hwang, T. Kam, and M. Pedram. “A Study of the Effectiveness of CPU Consolidation in a Virtualized Multi-Core Server System,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Jul. 2012.
  87. W. Lee, Y. Wang, D. Shin, N. Chang, and M. Pedram. “Power Conversion Efficiency Characterization and Optimization for Smartphones,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Jul. 2012.
  88. I. Hwang and M. Pedram. “Portfolio Theory-Based Resource Assignment in a Cloud Computing System,” Proc. of the IEEE Cloud, Jun. 2012.
  89. H. Goudarzi and M. Pedram. “Energy Efficient VM Placement in the Cloud Computing System,” Proc. of the IEEE Cloud, Jun. 2012.
  90. X. Lin, Y. Wang, S. Yue, D. Shin, N. Chang, and M. Pedram. “Near-Optimal, Dynamic Module Reconfiguration in a Photovoltaic System to Combat Partial Shading Effects,” Proc. of the 49th Design Automation Conf., Jun. 2012.
  91. Y. Kim, S. Park, N. Chang, Q. Xie, Y. Wang, and M. Pedram. “Networked Architecture for Hybrid Electrical Energy Storage Systems,” Proc. of the 49th Design Automation Conf., Jun. 2012.
  92. H. Goudarzi, M. Ghasemazar, and M. Pedram. “SLA-based optimization of power and migration cost in cloud computing,” Proc. of Int’l Symposium on Cluster, Cloud and Grid Computing, May 2012.
  93. Y. Wang, S. Yue, L. Kerofsky, S. Deshpande, and M. Pedram. “A Hierarchical Control Algorithm for Managing Electrical Energy Storage Systems in Homes Equipped with PV Power Generation,” Proc. of the IEEE Green Technologies Conference, Apr. 2012.
  94. Y. Wang, X. Lin, Y. Kim, N. Chang, and M. Pedram. “Enhancing Efficiency and Robustness of a Photovoltaic Power System Under Partial Shading,” Proc. of the 13th Int’l Symposium on Quality of Electronic Design, Mar. 2012.
  95. M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram. “An Architecture-Level Approach for Mitigating the Impact of Process Variations on Extensible Processors,” Proc. of Design Automation and Test in Europe, Mar. 2012.
  96. M. J. Dousti and M. Pedram. “Minimizing the latency of quantum circuits during mapping to the ion-trap circuit fabric,” Proc. of Design Automation and Test in Europe, Mar. 2012.
  97. Q. Xie, X. Lin, Y. Wang, M. Pedram. D. Shin, and N. Chang, “State of health aware charge management in hybrid electrical energy storage systems,” Proc. of Design Automation and Test in Europe, Mar. 2012.
  98. Y. Wang, Q. Xie, M. Pedram. Y. Kim, N. Chang, and M. Poncino, “Multiple-source and multiple-destination charge migration in hybrid electrical energy storage systems,” Proc. of Design Automation and Test in Europe, Mar. 2012.
  99. Q. Xie, Y. Wang, M. Pedram. Y. Kim, D. Shin, and N. Chang, “Charge replacement in hybrid electrical energy storage systems,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2012.
  100. T.Cui, H. Goudarzi, S. Hatami, S. Nazarian, and M. Pedram. “Concurrent optimization of consumer’s electrical energy bill and producer’s power generation cost under a dynamic pricing model,” Proc. of the 3rd IEEE PES Innovative Smart Grid Technologies Conference, Jan. 2012.
  101. Y. Kim, S. Park, Y. Wang, Q. Xie, N. Chang, M. Poncino, and M. Pedram. “Balanced reconfiguration of storage banks in a hybrid electrical energy storage system,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2011.
  102. H. Goudarzi, S. Hatami, and M. Pedram. “Demand-side load scheduling incentivized by dynamic energy prices,” Proc. of the 2nd Int’l Conf. on Smart Grid Communications, Oct. 2011.
  103. Q. Xie, Y. Wang, Y. Kim, N. Chang, and M. Pedram. “Charge allocation for hybrid electrical energy storage systems,” Proc. of the International Conference on Hardware/Software Codesign and System Synthesis, Oct. 2011.
  104. W. Lee, Y. Kim, Y. Wang, N. Chang, M. Pedram, and S. Han, “Versatile high-fidelity photovoltaic module emulation system,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2011.
  105. Y. Wang, Y. Kim, Q. Xie, N. Chang, and M. Pedram. “Charge migration efficiency optimization in hybrid electrical energy storage (HEES) systems,” Proc. of the Int’l Symposium on Low Power Electronics and Design, Aug. 2011.
  106. H. Goudarzi and M. Pedram. “Multi-dimensional SLA-based resource allocation for multi-tier cloud computing systems,” Proc. of the IEEE Cloud, Jul. 2011.
  107. H. Goudarzi and M. Pedram. “Maximizing profit in the cloud computing system via resource allocation,” Proc. of the first international workshop on Data Center Performance, held in conjunction with the 31st Int’l Conference on Distributed Computing System, Minneapolis, MN, Jun. 2011.
  108. H. Abrishami, J. Lou, J. Qin, J. Froessl, and M. Pedram. “Post sign-off leakage power optimization,” Proc. of the 48th Design Automation Conf., Jun. 2011.
  109. Y. Wang, Q. Xie, A. Ammari, and M. Pedram. “Deriving a near-optimal power management policy using model-free reinforcement learning and Bayesian classification,” Proc. of the 48th Design Automation Conf., Jun. 2011.
  110. D. Shin, Y. Kim, N. Chang, and M. Pedram. “Dynamic voltage scaling of OLED displays,” Proc. of the 48th Design Automation Conf., Jun. 2011.
  111. F. Kashfi, S. Hatami, and M. Pedram. “Multi-objective optimization techniques for VLSI circuits,” Proc. of the 12th Int’l Symposium on Quality of Electronic Design, Mar. 2011.
  112. M. Kamal, A. Afzali-Kusha, and M. Pedram. “Timing variation-aware custom instruction extension technique,” Proc. of Design Automation and Test in Europe, Mar. 2011.
  113. D. Shin, Y. Wang, N. Chang, and M. Pedram. “Battery-supercapacitor hybrid system for high-rate pulsed load applications,” Proc. of Design Automation and Test in Europe, Mar. 2011.
  114. M. GhasemAzar and M. Pedram. “Variability aware dynamic power management for chip multiprocessor architectures,” Proc. of Design Automation and Test in Europe, Mar. 2011.
  115. S. Hatami and M. Pedram. “Minimizing the electricity bill of cooperative users under a quasi-dynamic pricing model,” Proc. of the 1st IEEE International Conference on Smart Grid Communications, Oct. 2010.
  116. M. Pedram and I. Hwang, “Power and performance modeling in a virtualized server system,” Green Comupting Workshop, 39th International Conference on Parallel Processing Workshop, Sep. 2010, pp. 520-526.
  117. Y. Kim, N. Chang, Y. Wang, and M. Pedram. “Maximum power transfer tracking for a photovoltaic-supercapacitor energy system,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2010, pp. 307-312.
  118. M. Pedram. N. Chang, Y. Kim, and Y. Wang, “Hybrid electrical energy storage systems,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2010, pp. 363-368.
  119. J. Park, D. Shin, N. Chang, and M. Pedram. “Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2010, pp. 419-424.
  120. M. GhasemAzar, E. Pakbaznia, and M. Pedram. “Minimizing energy consumption of a chip multiprocessor system through simultaneous core consolidation and dynamic voltage/frequency scaling,” Proc. of IEEE Int’l Symposium on Circuits and Systems, May 2010, pp.49-52.
  121. H. Abrishami, S. Hatami, and M. Pedram. “Analysis and optimization of sequential circuit elements to combat single-event timing upsets,” Proc. of IEEE Int’l Symposium on Circuits and Systems, May 2010, pp. 985-988.
  122. M. GhasemAzar, E. Pakbaznia, and M. Pedram “Minimizing the power consumption of a chip multiprocessor under an average throughput constraint,” Proc. of the 11th Int’l Symposium on Quality of Electronic Design, Mar. 2010, pp. 362-371.
  123. H. Abrishami, S. Hatami, and M. Pedram “Multi-corner, energy-delay optimized, NBTI-aware flip-flop design,” Proc. of the 11th Int’l Symposium on Quality of Electronic Design, Mar. 2010, pp. 652-659.
  124. E. Pakbaznia, M. GhasemAzar, and M. Pedram. “Temperature-aware dynamic resource provisioning in a power-optimized datacenter,” Proc. of Design Automation and Test in Europe, Mar. 2010, pp. 124-129.
  125. H-S. Jung and M. Pedram. “Optimizing the power delivery network in dynamically voltage scaled systems with uncertain power mode transition times,” Proc. of Design Automation and Test in Europe, Mar. 2010, pp. 351-356.
  126. S. Hatami and M. Pedram. “Efficient representation, stratification, and compression of variational CSM library waveforms using robust principle component analysis,” Proc. of Design Automation and Test in Europe, Mar. 2010, pp. 1285-1290.
  127. N. Mohyuddin, K. Patel, and M. Pedram. “Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors,” Proc. of Int’l Conference on Computer Design, Oct. 2009, pp. 166-172.
  128. E. Pakbaznia and M. Pedram. “Minimizing data center cooling and server power costs,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2009, pp. 145-150.
  129. S. Hatami, P. Feldmann, S. Abbaspour, M. Pedram. “Efficient compression and handling of current source model library waveforms,” Proc. of Design Automation and Test in Europe, Apr. 2009, pp. 1178-1183.
  130. E. Pakbaznia and M. Pedram. “Design and application of multi-modal power-gating structures,” Proc. of the 10th Int’l Symposium on Quality of Electronic Design, Mar. 2009, pp. 120-126.
  131. M. Soltan and M. Pedram. “Durability of wireless networks of battery-powered devices,” Proc. of Consumer Communications and Networking Conference, Jan. 2009, pp. 1-6.
  132. A-M. Rahmani, M. Daneshtalab, A. Afzali-Kousha, and M. Pedram. “Forecasting-based dynamic virtual channels allocation for power optimization of network-on-chips,” Proc. of the 22nd Int’l Conference on VLSI Design, Jan. 2009, pp. 151-156.
  133. M. Ghasemazar and M. Pedram. “Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2008, pp. 155-160.
  134. N. Mohyuddin, E. Pakbaznia, and M. Pedram. “Probabilistic error propagation in a logic circuit using the Boolean difference calculus,” Proc. of Int’l Conference on Computer Design, Oct. 2008, pp. 7-13.
  135. H. Abrishami, S. Hatami, and M. Pedram. “Characterization and design of sequential elements to combat soft errors,” Proc. of Int’l Conference on Computer Design, Oct. 2008, pp. 194-199.
  136. M. Ghasemazar, B. Amelifard, and M. Pedram. “A mathematical solution to power optimal pipeline design by utilizing soft edge flip-flops,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2008 , pp. 33-38. (Honorable Mention Award) .
  137. H-S. Jung, P. Rong, and M. Pedram. “Stochastic modeling of a thermally-managed multi-core system,” Proc. of Design Automation Conference, Jun. 2008, pp. 728-733.
  138. M. Soltan, I-K. Hwang, and M. Pedram. “Heterogeneous modulation for trading-off energy balancing with bandwidth efficiency in hierarchical sensor networks,” Proc. of Int’l Symposium on a World of Wireless, Mobile and Multimedia Networks, Newport Beach, CA, USA, Jun. 2008.
  139. M. Soltan, I-K. Hwang, and M. Pedram. “Modulation-aware energy balancing in hierarchical wireless sensor networks,” Proc. of Int’l Symposium on Wireless Pervasive Computing, Santorini, Greece, May 2008.
  140. H. Abrishami, S. Hatami, B. Amelifard, and M. Pedram. “NBTI-aware flip-flop characterization and design,” Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 29-34.
  141. S. Hatami, H. Abrishami, and M. Pedram. “Statistical timing analysis of flip-flops considering codependent setup and hold times,” Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 101-106.
  142. K. Patel, W-b. Lee, and M. Pedram. “In-order pulsed charge recycling in off-chip data buses,” Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 371-374.
  143. H-S. Jung and M. Pedram. “Improving the efficiency of power management techniques by using Bayesian classification,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2008, pp. 178-183.
  144. H-S. Jung and M. Pedram. “Resilient dynamic power management under uncertainty,” Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 224-229.
  145. E. Pakbaznia and M. Pedram. “Coarse-grain MTCMOS sleep transistor sizing using delay budgeting,” Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 385-390.
  146. B. Amelifard, S. Hatami, H. Fatemi, and M. Pedram. “A current source model for CMOS logic cells considering multiple input switching and stack effect,” Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 568-573.
  147. H-S. Jung and M. Pedram. “A stochastic local hot spot alerting technique,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2008, pp. 468-473.
  148. S. Koohi, M. Mirza-Aghatabar, S. Hessabi, and M. Pedram. “High-level modeling approach for analyzing the effects of traffic models on power and throughput in mesh-based NoCs,” Proc. of the 21st Int’l Conference on VLSI Design, Jan. 2008, pp. 249-254.
  149. H-S. Jung and M. Pedram. “Continuous frequency adjustment technique based on dynamic workload prediction,” Proc. of the 21st Int’l Conference on VLSI Design, Jan. 2008, pp. 415-420.
  150. E. Pakbaznia, F. Fallah, and M. Pedram. “Sizing and placement of charge recycling transistors in MTCMOS circuits,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2007, pp. 791-796.
  151. M. Mirza-Aghatabar, S. Koohi, S. Hessabi, and M. Pedram. “An empirical investigation of Mesh and Torus NoC topologies under different routing algorithms and traffic models,” Proc. of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, Aug. 2007, pp. 19-26.
  152. H. Fatemi, B. Amelifard and M. Pedram. “Power optimal MTCMOS repeater insertion for global buses,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 98-103.
  153. K. Patel, W-B. Lee, and M. Pedram. “Minimizing power dissipation during write operation to register files,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 183-188.
  154. B. Amelifard and M. Pedram. “Design of an efficient power delivery network in an SoC to enable dynamic power management,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 328-333.
  155. B. Amelifard and M. Pedram. “Optimal selection of voltage regulator modules in a power delivery network,” Proc. of Design Automation Conference, Jun. 2007, pp. 168-173.
  156. H-S. Jung and M. Pedram. “A unified framework for system-level design: modeling and performance optimization of scalable networking systems,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2007, pp. 198-203.
  157. H-S. Jung and M. Pedram. “Dynamic Power Management under Uncertain Information,” Proc. of Design Automation and Test in Europe, Apr. 2007, pp. 1060-1065.
  158. K. Patel, W-b. Lee, and M. Pedram. “Active bank switching for temperature control of the register file in a microprocessor,” Proc. of Great Lakes Symposium on VLSI, Mar. 2007, pp. 231-234.
  159. C-S. Hwang, P. Rong, and M. Pedram. “Sleep transistor distribution in row-based MTCMOS designs,” Proc. of Great Lakes Symposium on VLSI, Mar. 2007, pp. 235-240.
  160. H-S. Jung, A. Hwang, and M. Pedram. “Flow-Through-Queue based Power Management for Gigabit Ethernet Controller,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2007, pp. 571-576.
  161. H. Fatemi, S. Nazarian, and M. Pedram. “A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2007, pp. 774-779.
  162. M. Soltan, M. Maleki, and M. Pedram. “Lifetime-aware hierarchical wireless sensor network architecture with mobile overlays,” Proc. of IEEE Radio and Wireless Symposium, Jan. 2007, pp. 325-328.
  163. M. Najibi, M. Salehi, A. Afzali Kusha, M. Pedram. S. M. Fakhraie, and H. Pedram. “Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2006, pp. 755-760.
  164. W-b. Lee, K. Patel and M. Pedram. “B2Sim: A fast micro-architecture simulator based on basic block characterization,” Proc. of Third Int’l Conference on Hardware/Software Codesign and System Synthesis, Oct. 2006, pp. 199-204.
  165. H-S. Jung and M. Pedram. “Stochastic dynamic thermal management: A Markovian decision-based approach,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2006, pp. 452-457.
  166. W-B. Lee, K. Patel, and M. Pedram. “Dynamic thermal management for MPEG-2 decoding,” Proc. of Symposium on Low Power Electronics and Design, Oct. 2006, pp. 316-321.
  167. B. Amelifard, F. Fallah, and M. Pedram. “Low-power fanout optimization using MTCMOS and Multi-Vt techniques,” Proc. of Symposium on Low Power Electronics and Design, Oct. 2006, pp. 334-337.
  168. E. Pakbaznia, F. Fallah, and M. Pedram. “Charge recycling in MTCMOS circuits: concept and analysis,” Proc. of Design Automation Conf, Jul. 2006, pp. 97-102.
  169. H. Fatemi, S. Nazarian, and M. Pedram. “Statistical logic cell delay analysis using a current-based model,” Proc. of Design Automation Conf, Jul. 2006, pp. 253-256.
  170. W-B. Lee, A. Iranli, M. Pedram. “Backlight dimming in power-aware mobile displays,” Proc. of Design Automation Conf, Jul. 2006, pp. 371-374.
  171. C-W. Kang and M. Pedram. “Low-power clustering with minimum logic replication for coarse-grained, antifuse-based FPGAs,”, Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 79-84.
  172. H. Fatemi, S. Abbaspour, M. Pedram. A. Ajami, and E. Tuncer, “SACI: Statistical static timing analysis of coupled interconnects,”, Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 241-246.
  173. S. Nazarian, A. Iranli, and M. Pedram. “Crosstalk analysis in nanometer technologies,”, Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 253-258.
  174. B. Amelifard, F. Fallah and M. Pedram. “Low-leakage SRAM design with dual Vt transistors,” “Low-leakage SRAM design with dual Vt transistors,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2006, pp. 729-734.
  175. C-S. Hwang and M. Pedram. “Gate sizing and replication to minimize the effects of virtual ground parasitic resistances in MTCMOS designs,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2006, pp. 741-746.
  176. S. Nazarian, M. Pedram. S.K. Gupta, and M.A. Breuer, “STAX: Statistical crosstalk target set compaction,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 172-177.
  177. A. Abdollahi and M. Pedram. “Analysis and synthesis of quantum circuits by using quantum decision diagrams,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 317-322.
  178. S. Abbaspour, H. Fatemi, and M. Pedram. “Parameterized block-based non-Gaussian statistical interconnect timing analysis,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 533-538.
  179. S. Nazarian and M. Pedram. “Cell delay analysis based on rate-of-current change,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 539-544.
  180. B. Amelifard, F. Fallah and M. Pedram. “Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using dual-Vt and dual-Tox assignment,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 995-1000.
  181. P. Rong and M. Pedram. “Determining the optimal timeout values for a power-managed system based on the theory of Markovian processes: Offline and online algorithms,” Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 1128-1133.
  182. S. Nazarian and M. Pedram. “CGTA: Current gain-based timing analysis for logic cells,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 67-72.
  183. C-S. Hwang and M. Pedram. “Timing-driven placement based on monotone cell ordering constraints,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 201-206.
  184. P. Rong and M. Pedram. “Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 473-478.
  185. S. Abbaspour, H. Fatemi, and M. Pedram. “Parameterized block-based non-Gaussian statistical gate timing analysis,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 947-952.
  186. S. Abbaspour, H. Fatemi, and M. Pedram. “VGTA: Variation-aware gate timing analysis,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2005, pp. 351-356.
  187. B. Amelifard, F. Fallah, and M. Pedram. “Low-power fanout optimization using multiple threshold voltage inverters,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 95-98.
  188. A. Iranli, M. Maleki, and M. Pedram. “Energy-efficient strategies for deployment of a two-level wireless sensor network,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 233-238.
  189. P. Rong and M. Pedram. “Hierarchical dynamic power management with application scheduling,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 269-274.
  190. A. Abdollahi, F. Fallah, and M. Pedram. “An effective power mode transition technique in MTCMOS circuits,” Proc. of Design Automation Conference, Jun. 2005, pp. 37-42.
  191. A. Abdollahi and M. Pedram. “A new canonical form for fast Boolean matching in logic synthesis and verification,” Proc. of Design Automation Conference, Jun. 2005, pp. 379-384. (Best Paper Award)
  192. A. Iranli and M. Pedram. “DTM: Dynamic tone mapping for backlight scaling,” Proc. of Design Automation Conference, Jun. 2005, pp. 612-617.
  193. S. Nazarian, M. Pedram, and E. Tuncer“An empirical study of crosstalk in VDSM technologies,” Proc. of Great Lakes Symposium on VLSI, Apr. 2005, pp. 317-322.
  194. S. Abbaspour, H. Fatemi, and M. Pedram. “VITA: Variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input,” Proc. of Great Lakes Symposium on VLSI, Apr. 2005, pp. 426-430.
  195. M. Maleki and M. Pedram. “QoM and lifetime-constrained random deployment of sensor networks for minimum energy consumption,” The Fourth Int’l Conference on Information Processing in Sensor Networks, April 2005.
  196. A. Iranli, H. Fatemi, and M. Pedram. “Lifetime-aware intrusion detection under safeguarding constraints-ENIS-1 problem,” The Fourth Int’l Conference on Information Processing in Sensor Networks, April 2005.
  197. A. Abdollahi, F. Fallah, and M. Pedram. “Analysis and optimization of static power considering transition dependency of leakage current in VLSI circuits,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2005, pp. 77-82.
  198. B. Amelifard, F. Fallah, and M. Pedram. “Closing the gap between carry select adder and ripple carry adder: A new class of low-power high-performance adders,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2005, pp. 148-152.
  199. S. Nazarian, M. Pedram. E. Tuncer, and T. Lin, “Sensitivity-based gate delay propagation in static timing analysis,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2005, pp. 536-541.
  200. A. Iranli, H. Fatemi, and M. Pedram. “HEBS: Histogram equalization for backlight scaling,” Proc. of Design Automation and Test in Europe, Mar. 2005, pp. 346-351.
  201. S. Nazarian and M. Pedram. “Modeling and propagation of noisy waveforms in static timing analysis,” Proc. of Design Automation and Test in Europe, Mar. 2005, pp. 776-777.
  202. C-W. Kang and M. Pedram. “PackGen: A clustering technique for mapping coarse-grained, antifuse-based FPGAs,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2005, pp. 785-790.
  203. C-S. Hwang and M. Pedram. “PMP: Performance-driven multilevel partitioning by aggregating the preferred signal directions of I/O conduits,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2005, pp. 428-431.
  204. K. Choi, W. Lee, R. Soma and M. Pedram. “Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation,” Proc. of Int’l Conference on Computer Aided Design, Nov. 2004, pp. 29-34.
  205. K. Choi, R. Soma and M. Pedram. “Dynamic voltage and frequency scaling based on workload decomposition,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2004, pp. 174-179.
  206. K. Choi, R. Soma and M. Pedram. “Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding,” Proc. of 41st Design Automation Conference, Jun. 2004, pp. 544-549.
  207. S. Abbaspour, A. Ajami, M. Pedram, and E. Tuncer, “TFA: A threshold-based filtering algorithm for propagation delay and output slew calculation of high-speed VLSI interconnects,”  Proc. of Great Lakes Symposium on VLSI, Apr. 2004, pp. 19-24.
  208. M. Maleki and M. Pedram. “Lifetime-aware multicast routing in wireless ad hoc networks,”  Proc. of IEEE Wireless Communication and Networking Conference, Mar. 2004, pp. 1317- 1323.
  209. R. Marculescu, M. Pedram, and J. Henkel, “Distributed multimedia system design: A holistic perspective,” Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 2, pp. 21342.
  210. K. Choi, R. Soma and M. Pedram. “Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times,” Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10004.
  211. W-C. Cheng, Y. Hou and M. Pedram. “Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling,” Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10252.
  212. A. Iranli, K. Choi and M. Pedram. “A game theoretic approach to low energy wireless video streaming,” Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10696.
  213. S. Abbaspour and M. Pedram. “Gate delay calculation considering the crosstalk capacitances,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 853-858.
  214. H. Shim, N. Chang, and M. Pedram. “A compressed frame buffer to reduce display power consumption in mobile systems,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 819-824.
  215. C-S. Hwang and M. Pedram. “Interconnect design methods for memory,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. pp. 438-443.
  216. C-W. Kang, A. Iranli, and M. Pedram. “Technology Mapping and Packing for Coarse-Grained, Anti-Fuse Based FPGAs,” Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 209-211.
  217. A. Iranli, H. Fatemi, and M. Pedram. “A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2003, pp. 504-509.
  218. A. Abdollahi, F. Fallah, and M. Pedram. “Precomputation-based Guarding for Dynamic and Leakage Power Reduction,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2003, pp. 90-97.
  219. F. Tari, P. Rong, and M. Pedram. “An Energy-aware Simulation Model and a Transaction Protocol for Dynamic Workload Distribution in Mobile Ad Hoc Networks,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2003, pp. 444-449.
  220. K. Choi, K. Kim, and M. Pedram. “Energy-aware MPEG-4 FGS streaming,”  Proc. of 40th Design Automation Conference, Jun. 2003, pp. 912-915.
  221. P. Rong and M. Pedram. “Extending the lifetime of a network of battery-powered mobile devices by remote processing: a Markovian decision-based approach,”  Proc. of 40th Design Automation Conference, Jun. 2003, pp. 906-911.
  222. C-W. Kang, S. Abbaspour, and M. Pedram. “Buffer sizing for minimum energy-delay product by using an approximating polynomial,”  Proc. of Great Lakes Symposium on VLSI, Apr. 2003, pp. 112-115.
  223. M. Maleki, K. Dantu, and M. Pedram. “Lifetime Prediction Routing in Mobile Ad Hoc Networks,”  Proc. of IEEE Wireless Communication and Networking Conference, Mar. 2003, pp. 1185-1190.
  224. A. H. Ajami, K. Banerjee, A. Mehrotra, and M. Pedram. “Analysis of IR-drop scaling with implications for deep submicron P/G network designs,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2003, pp. 35-40.
  225. S. Abbaspour, M. Pedram and P. Heydari, “Optimizing the energy-delay-ringing product in on-chip CMOS line drivers,”  Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2003, pp. 261-266.
  226. P. Rong and M. Pedram. “Remaining battery capacity prediction for Lithium-ion batteries,”  Proc. of Design Automation and Test in Europe, Mar. 2003, pp. 1148-1149.
  227. W-C. Chung and M. Pedram. “Chromatic encoding: a low power encoding technique for the digital visual interface,”  Proc. of Design Automation and Test in Europe, Mar. 2003, pp. 694-699.
  228. Y. Aghaghiri, F. Fallah, and M. Pedram. “BEAM: bus encoding based on instruction-set-aware memories,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 3-8.
  229. S. Abbaspour and M. Pedram. “Calculating the effective capacitance for the RC interconnect in VDSM technologies,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 43-48.
  230. C-W. Kang and M. Pedram. “Technology mapping for low leakage power and high speed with hot-carrier effect consideration,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 203-208.
  231. A. Iranli, P. Rezvani, and M. Pedram. “Low power synthesis of finite state machines with mixed D and T flip-flops,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003 pp. 803-808.
  232. K. Choi, K. Dantu, W-C. Cheng, and M. Pedram. “Frame-based dynamic voltage and frequency scaling for a MPEG decoder,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2002, pp. 732-737.
  233. P. Rong and M. Pedram. “Battery-aware power management based on markovian decision processes,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2002, pp. 712-717.
  234. A. Abdollahi, F. Fallah, and M. Pedram. “Runtime mechanisms for leakage current reduction in CMOS VLSI circuits,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 190-195.
  235. Y. Aghaghiri, F. Fallah, and M. Pedram. “Reducing transitions on memory buses using sector-based encoding technique,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 190-195.
  236. M. Maleki, K. Dantu, and M. Pedram. “Power-aware source routing protocol for mobile ad hoc networks,” Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 72-75.
  237. P. Heydari, S. Abbaspour and M. Pedram. “A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters,”  Proc. of IEEE Custom Integrated Circuits Conference, May 2002.
  238. Y. Aghaghiri, F. Fallah, and M. Pedram. “ALBORZ: address level bus power optimization,”  Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2002, pp. 470-475.
  239. P. Rezvani and M. Pedram. “Concurrent and Selective Logic Extraction with Timing Consideration,”  Proc. of Design Automation and Test in Europe, Mar. 2002, pp. 1086.
  240. Y. Aghaghiri, F. Fallah, and M. Pedram. “EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses,”  Proc. of Design Automation and Test in Europe, Mar. 2002, pp. 1102.
  241. W. Chen, M. Pedram, and P. Buch, “Buffered routing tree construction under buffer placement blockages,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 381-386.
  242. P. Heydari and M. Pedram. “Interconnect energy dissipation modeling in high-speed ULSI circuits,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 132-137
  243. W-C. Cheng and M. Pedram. “Software-only bus encoding techniques for an embedded system,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 126-131
  244. A. Ajami, K. Banarjee and M. Pedram. “Analysis of substrate thermal gradient effects on optimal buffer insertion,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2001, pp. 44-48.
  245. P. Heydari and M. Pedram. “Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2001, pp. 586-591.
  246. P. Heydari and M. Pedram. “Jitter-induced power/ground noise in CMOS PLLs: a design perspective,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2001, pp. 209-213.
  247. P. Heydari and M. Pedram. “Analysis and reduction of capacitive coupling noise in high-speed VLSI circuits,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2001, pp. 104-109.
  248. Y. Aghaghiri, F. Fallah, and M. Pedram. “Irredundant address bus encoding for low power,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 2001, pp. 82-187.
  249. A. Ajami, K. Banerjee, and M. Pedram. “Non-uniform chip-temperature dependent signal integrity,”  Proc. of IEEE Symposium on VLSI Technology and Circuits, Jun. 2001, pp. 145-146.
  250. Q. Qiu, Q. Wu and M. Pedram. “Dynamic power management in a mobile multimedia system with guaranteed quality-of-service,”  Proc. of 38th Design Automation Conference, Jun. 2001, pp. 834-839.
  251. A. Ajami, K. Banerjee, M. Pedram, and L.van Ginneken, “Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs” Proc.of 38th Design Automation Conference, Jun.2001,pp.567-572.
  252. A. Ajami, K. Banerjee, and M. Pedram. “Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs,”  Proc. of IEEE Custom Integrated Circuits Conference, May 2001, pp. 233-236.
  253. K. Banerjee, M. Pedram, and A. Ajami, “Analysis and optimization of thermal issues in high performance VLSI,”  Proc. of Int’l Symposium on Physical Design, Apr. 2001, pp. 230-237.
  254. C-T Hsieh, L-S. Chen, and M. Pedram. “Microprocessor power analysis by labeled simulation,”  Proc. of Design Automation and Test in Europe, Mar. 2001, pp. 182-189.
  255. W-C. Cheng and M. Pedram. “Memory bus encoding for low power: a tutorial,” Proc. of Int’l Symposium on Quality of Electronic Design, Mar. 2001.
  256. A. Ajami and M. Pedram. “Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp.595-600.
  257. W-C. Cheng and M. Pedram. “Low power techniques for address encoding and memory allocation,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp. 245-250.
  258. M. Pedram. “Power management and optimization in embedded systems,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp. 239-244.
  259. P. Heydari and M. Pedram. “Balanced truncation with spectral shaping for RLC interconnects,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, 203-208.
  260. W. Chen and M. Pedram. “Simultaneous gate sizing and fanout optimization,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 2000, pp. 374-378.
  261. P. Heydari and M. Pedram. “Analysis and optimization of ground bounce in digital CMOS circuits,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2000, pp. 121-126. (Best Paper Award)
  262. W-C. Cheng and M. Pedram. “Power-optimal encoding for DRAM address bus,”  Proc. of Symposium on Low Power Electronics and Design, Jul. 2000, pp. 250-252.
  263. X. Wu and M. Pedram. “Low power sequential circuit design by using priority encoding and clock gating,”  Proc. of Symposium on Low Power Electronics and Design, Jul. 2000, pp. 143-148.
  264. Q. Qiu, Q. Wu and M. Pedram. “OS-directed power management for mobile electronic systems,”  Proc. of the 39th Power Source Conference, Jun. 2000, pp. 506-509.
  265. X. Wu and M. Pedram. “Propagation algorithm of behavior probability in power estimation based on multiple-valued logic,”  Proc. of Int’l Symposium on Multiple-Valued Logic, May 2000, pp. 453-459.
  266. S. Ou and M. Pedram. “Timing-driven placement based on partitioning with dynamic cut-net control,”  Proc. of 37th Design Automation Conference, Jun. 2000, pp. 472-476.
  267. Q. Wu, Q. Qiu and M. Pedram. “Dynamic power management of complex systems using generalized stochastic Petri nets,”  Proc. of 37th Design Automation Conference, Jun. 2000, pp. 352-356.
  268. P. Heydari and M. Pedram. “Analysis of jitter due to power-supply noise in phase-locked loops,”  Proc. of IEEE Custom Integrated Circuits Conference, May 2000.
  269. C-T. Hsieh and M. Pedram. “Architectural power optimization by bus splitting,”  Proc. of Design Automation and Test in Europe, Mar. 2000, pp. 612.
  270. Q. Wu, Q. Qiu and M. Pedram. “An interleaved dual-battery power supply for battery-operated electronics,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 387-390.
  271. X. Wu, J. Wei, M. Pedram and Q. Wu, “Low power design of sequential circuits using a quasi-synchronous derived clock,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 345-350.
  272. M. Pedram and X. Wu, “Analysis of clocked-power CMOS with application to the design of energy recovery circuits,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 339-344.
  273. J. Lou, W. Chen and M. Pedram. “Concurrent logic restructuring and placement for timing closure,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1999, pp. 31-35.
  274. P. Rezvani, A. Ajami, M. Pedram and H. Savoj, “LEOPARD: A logical effort-based fanout optimizer for area and delay,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1999, pp. 516-519.
  275. Q. Qiu, Q. Wu and M. Pedram. “Stochastic modeling of a power-managed system: construction and optimization,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1999, pp. 194-199.
  276. R. Marculescu, D. Marculescu and M. Pedram. “Non-stationary effects in trace-driven power analysis,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1999, pp. 133-138.
  277. M. Pedram and Q. Wu, “Design considerations for battery-powered electronics,”  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 861-866.
  278. Q. Qiu and M. Pedram. “Dynamic power management based on continuous-time Markov decision processes,”  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 555-561.
  279. A. Salek, J. Lou and M. Pedram. “MERLIN: Semi-order-dependent hierarchical buffered routing tree generation using local neighborhood search,”  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 472-478.
  280. W. Chen, C-T. Hsieh and M. Pedram. “Gate sizing with controlled displacement,”  Proc. of Int’l Symposium on Physical Design, Apr. 1999, pp. 127-132.
  281. J. Chang and M. Pedram. “Codex-DP: codesign of communicating systems using dynamic programming,”  Proc. of Design Automation and Test in Europe, Mar. 1999, pp. 568-573.
  282. M. Pedram and Q. Wu, “Battery-powered digital CMOS design,”  Proc. of Design Automation and Test in Europe, Mar. 1999, pp. 72-76.
  283. M. Pedram. C-Y. Tsui and Q. Wu, “An integrated battery-hardware model for portable electronics,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 109-112.
  284. P. Rabiei and M. Pedram. “Model order reduction of large circuits using balanced truncation,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 237-240.
  285. S. Ou and M. Pedram. “Timing-driven bipartitioning with replication using iterative quadratic programming,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 105-108.
  286. A. Salek, J. Lou and M. Pedram. “A simultaneous routing tree construction and fanout optimization algorithm,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1998, pp. 625-630.
  287. P. Cocchini, M. Pedram. G. Piccinini and M. Zamboni, “Fanout optimization under a submicron transistor-level delay model,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1998, pp. 551-556.
  288. C-S. Ding, C-T. Hsieh and M. Pedram. “Improving sampling efficiency for total power estimation at the system level,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1998.
  289. D. Marculescu, R. Marculescu and M. Pedram. “Theoretical bounds for switching activity analysis in finite-state machines,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1998.
  290. Q. Qiu, Q. Wu and M. Pedram. “Maximum power estimation using the limiting distributions of extreme order statistics,”  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 684-689.
  291. A. Salek, J. Lou and M. Pedram. “A DSM design flow: putting floorplanning, technology mapping and gate placement together,”  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 287-290.
  292. J. Oh and M. Pedram. “Multi-pad power/ground network design for uniform distribution of ground bounce,”  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 128-133.
  293. P. Heydari and M. Pedram. “Calculation of ramp response of lossy transmission lines using two-port network functions,”  Proc. of of Int’l Symposium on Physical Design, Apr. 1998, pp. 152-157.
  294. D. Marculescu, R. Marculescu and M. Pedram. “Trace-driven steady-state probability estimation in FSMs with application to power estimation,”  Proc. of Design Automation and Test in Europe, Feb. 1998, pp. 774-779.
  295. J. Oh and M. Pedram. “Gated clock routing minimizing the switched capacitance,”  Proc. of Design Automation and Test in Europe, Feb. 1998, pp. 692-697.
  296. M. Pedram. “Logical-physical co-design for deep submicron circuits: challenges and solutions,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 137-142.
  297. J. Lou, A. Salek and M. Pedram. “An integrated flow for technology remapping and placement of sub-half-micron circuits,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 295-300.
  298. J. Oh and M. Pedram. “Power reduction in microprocessor chips by gated clock routing,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 313-318.
  299. Q. Wu, M. Pedram and X. Wu, “A new design of double edge triggered flip-flops,”  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 417-421.
  300. J. Lou, A. Salek and M. Pedram. “An exact solution to simultaneous technology mapping and linear placemenet,””  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1997, pp. 130-135.
  301. R. Marculescu, D. Marculescu and M. Pedram. “Block entropy and high-order temporal effects in composite sequence compacton for finite state machines,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1997, 190-195.
  302. Q. Qiu, Q. Wu, M. Pedram and C-S. Ding, “Cycle-accurate macro-models for RT-level power analysis,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1997, pp. 125-130.
  303. R. Marculescu, D. Marculescu and M. Pedram. “Sequence compacton for probabilistic analysis of finite state machines,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 12-15.
  304. C-S. Ding, Q. Wu, C-T. Hsieh and M. Pedram. “Statistical estimation of the cumulative distribution function for power dissipation in VLSI circuits,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 371-376.
  305. C-Y. Tsui, K-K. Chan, Q. Wu, C-S. Ding and M. Pedram. “A power estimation framework for designing low power portable video applications,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 421-424.
  306. E. Macii, M. Pedram and F. Somenzi, “High level power modeling, estimation and optimization,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 504-510.
  307. R. Marculescu, D. Marculescu and M. Pedram. “Hierarchical sequence compaction for power estimation,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 570-575.
  308. C-T. Hsieh, M. Pedram. H. Mehta and F. Rastgar, “Profile-driven program synthesis for evaluation of system power dissipation,”  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 576-581.
  309. X. Wu and M. Pedram. “Design of ternary CCD circuits referencing to current mode CMOS circuits,”  Proc. of Int’l Symposium on Multiple-Valued Logic, May 1997, pp. 209-214.
  310. Q. Wu, M. Pedram and X. Wu, “Clock-gating and its application to low power design of sequential circuits,”  Proc. of IEEE Custom Integrated Circuits Conference, May 1997, pp. 479-482.
  311. Q. Wu, M. Pedram and X. Wu, “A note on the relationship between signal probability and switching activity,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 117-120.
  312. R. Marculescu, D. Marculescu and M. Pedram. “Adaptive models for input data compaction for power simulators,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 391-396.
  313. Q. Wu, C-S. Ding, C-T. Hsieh and M. Pedram. “Statistical design of macro-models for RT-level power evaluation,”  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 523-528.
  314. M. Pedram and X. Wu, “A new description of CMOS circuits at switch-level,”  Proc. Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 551-556.
  315. C-T. Hsieh, C-S. Ding, Q. Wu and M. Pedram. “Statistical sampling and regression estimation in power macromodeling,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1996, pp. 583-588.
  316. C-S. Ding, C-T. Hsieh, Q. Wu and M. Pedram. “Stratified random sampling for power estimation,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1996, pp. 577-582.
  317. J-M. Chang and M. Pedram. “Module assignment for low power,”  Proc. of European Design Automation Conference, Sep. 1996, pp. 376-381.
  318. J-M. Chang and M. Pedram. “Energy minimization using multiple supply voltages,”  Proc. of Symposium on Low Power Electronics and Design, Aug. 1996, pp. 157-162.
  319. R. Marculescu, D. Marculescu and M. Pedram. “Stochastic sequential machine synthesis targeting constrained sequence generation,”  Proc. of 33rd Design Automation Conference, Jun. 1996, page 696-701.
  320. J. Oh, I. Pyo and M. Pedram. “Constructing lower and upper bounded delay routing trees using linear programming,”  Proc. of 33rd Design Automation Conference, Jun. 1996, page 401-404.
  321. C-Y. Tsui, D. Marculescu, R. Marculescu and M. Pedram. “Reducing the runtime of simulation-based power estimation by input vector compaction,,”  Proc. of 33rd Design Automation Conference, Jun. 1996, page 165-168.
  322. S. Iman and M. Pedram. “POSE: Power optimization and synthesis environment,”  Proc. of 33rd Design Automation Conference, Jun. 1996, page 21-26. (Best Paper Award)
  323. I. Pyo, J. Oh and M. Pedram. “Constructing routing trees with bounded difference Elmore delay,”  Proc. of IEEE Int’l Symposium Circuits and Systems, May 1996, page.
  324. K-R. Pan and M. Pedram. “FPGA synthesis for minimum area, delay and power consumption,” Proc. of European Design and Test Conference, Mar. 1996, page 603.
  325. I. Pyo, J. Oh and M. Pedram. “Constructing minimal spanning/Steiner trees with bounded path length,”  Proc. of European Design and Test Conference, Mar. 1996, pp. 244-249.
  326. S. Iman and M. Pedram. “Two-level logic minimization for low power,” Proc. of Int’l Conference on Computer Aided Design, Nov. 1995, pp. 433-438.
  327. H. Vaishnav and M. Pedram. “Delay optimal partitioning targeting low power VLSI circuits,” Proc. of Int’l Conference on Computer Aided Design, Nov. 1995, pp. 638-643.
  328. C-S. Ding and M. Pedram. “Tagged probabilistic simulation provides accurate and efficient power estimates at the gate level,”  Proc. of Symposium of Low Power Electronics, Sep. 1995, pp. 42-43.
  329. H. Vaishnav and M. Pedram. “Logic extraction based on normalized netlengths,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1995, pp. 658-663.
  330. R. Marculescu, D. Marculescu and M. Pedram. “Efficient power estimation for highly correlated input streams,”  Proc. of 32nd Design Automation Conference, Jun. 1995, pp. 628-634.
  331. J-M. Chang and M. Pedram. “Low power register allocation and binding,”  Proc. of 32nd Design Automation Conference, Jun. 1995, pp. 29-35.
  332. S. Iman and M. Pedram. “Logic extraction and decomposition for low power,” Proc. 32nd Design Automation Conference, pp. 248-253, Jun. 1995.
  333. H. Vaishnav and M. Pedram. “Minimizing the routing cost during logic extraction,” Proc. of 32nd Design Automation Conference, pp. 70-75, Jun. 1995.
  334. S-M. Liu, M. Pedram and A. M. Despain, “A fast state assignment procedure for synchronous FSMs,” Proc. of 32nd Design Automation Conference, pp. 327-332, Jun. 1995.
  335. M. Pedram. “CAD for Low power: status and promising directions,”  Proc. of Int’l Symposium on VLSI Technology, Systems and Applications, Jun. 1995.
  336. S-M. Liu, M. Pedram and A. M. Despain, “Plato_P: PLA timing optimization by partitioning,” Proc. of 1995 IEEE Int’l Symposium Circuits and Systems, May 1995.
  337. D. Marculescu, R. Marculescu and M. Pedram. “Information theoretic measures for energy consumption at register transfer level,”  Proc. of Int’l Symposium of Low Power Design, Apr. 1995, pp. 81-86.
  338. C-Y. Tsui, M. Pedram. C-H. Chen and A. M. Despain, “Low power state assignment targeting two- and multi-level logic implementations,” Proc. of Int’l Conference on Computer Aided Design, Nov. 1994, pp. 82-87.
  339. S. Iman and M. Pedram. “Multi-level network optimization for low power,” Proc.of Int’l Conference on Computer Aided Design, Nov. 1994, pp. 372-377.
  340. R. Marculescu, D. Marculescu and M. Pedram. “Switching activity estimation considering spatiotemporal correlations,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1994, pp. 294-299.
  341. D. Mukherjee, M. Pedram and M. Breuer, “Control strategies for chip-based DFT/BIST hardware,” Proc. of Int’l Test Conference, Oct. 1994, pp. 893-902.
  342. K-R. Pan, Y-T. Lai and M. Pedram. “FPGA Synthesis using OBDD-based function decomposition,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1994, pp. 30-35.
  343. S. Iman, M. Pedram and K. Chauduary, “Technology mapping using fuzzy logic,” Proc. of 31st Design Automation Conference, Jun. 1994, pp. 333-338.
  344. C-Y. Tsui, M. Pedram and A. M. Despain, “Exact and approximate methods for calculating signal and transition probabilities in FSMs,” Proc. of 31st Design Automation Conference, Jun. 1994, pp. 18-23.
  345. Y-T. Lai, M. Pedram and S. B. K. Vrudhula, “FGILP: an integer linear program solver based on function graphs,” Proc.of Int’l Conference on Computer Aided Design, Nov. 1993, pp. 685-689.
  346. D. Mukherjee, M. Pedram and M. Breuer, “Merging multiple FSM controllers for DFT/BIST hardware,” Proc. of Int’l Conference on Computer Aided Design, Nov. 1993, pp. 720-725.
  347. M. Pedram. B. S. Nobandegani and B. T. Preas, “Architecture and routability analysis for row-based FPGAs,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1993, pp. 230-235.
  348. C-Y. Tsui, M. Pedram and A. M. Despain, “Efficient estimation of dynamic power dissipation under a real delay model,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1993, pp. 224-228.
  349. C-Y. Tsui, M. Pedram and A. M. Despain, “Power estimation considering charging and discharging of internal nodes of CMOS gates,”  Proc. of the Synthesis and Simulation Meeting and Int’l Interchange, Oct. 1993, pp. 345-354.
  350. H. Vaishnav and M. Pedram. “PCUBE: performance driven placement algorithm for low power,” Proc. of European Design Automation Conference, Sep. 1993, pp. 72-77.
  351. C-Y. Tsui, M. Pedram and A. M. Despain, “Technology decomposition and mapping targeting low power dissipation,”  Proc. of 30th Design Automation Conference, Jun. 1993, pp. 68-73.
  352. Y-T. Lai, M. Pedram and S. Sastry, “BDD based decomposition of logic functions with application to FPGA synthesis,”  Proc. of 30th Design Automation Conference, Jun. 1993, pp. 230-235.
  353. H. Vaishnav and M. Pedram. “Routability driven fanout optimization,” Proc. of 30th Design Automation Conference, Jun. 1993, pp. 642-647.
  354. M. Pedram and H. Vaishnav, “Technology decomposition using optimal alphabetic trees,” Proc. of European Conference on Design Automation, Feb. 1993, pp. 573-577.
  355. S-M. Liu, K-R. Pan, M. Pedram and A. M. Despain, “Alleviating routing congestion by combining logic resynthesis and linear placement,”  Proc. of European Conference on Design Automation, Feb. 1993, pp. 578-582
  356. Y-T. Lai, S. Sastry (a.k.a. S. B. K. Vrudhula), and M. Pedram. “Boolean matching using BDDs with applications in logic synthesis and verification,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1992, pp. 452-458.
  357. D. Mukherjee, M. Pedram, and M. Breuer, “Minimal area merger of FSM controllers,” Proc. of European Design Automation Conference, Sep. 1992, pp. 278-283.
  358. K. Chaudhary and M. Pedram. “A near-optimal algorithm for technology mapping minimizing area under delay constraints,” Proc. of 29th Design Automation Conference, Jun. 1992, pp. 492-498.
  359. M. Pedram and N. Bhat, “Layout driven logic restructuring and decomposition,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1991, pp. 134-137.
  360. S. Mayrhofer, M. Pedram and U. Lauther, “A flow-based approach to the placement of Boolean networks,”  Proc. of IFIP Int’l Conference on VLSI, 1991.
  361. M. Pedram. K. Chaudhary and E. S. Kuh, I/O pad assignment based on circuit structure,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Sep. 1991, pp. 314-318.
  362. M. Pedram and N. Bhat, “Layout driven technology mapping,”  Proc. of 28th Design Automation Conference, Jun. 1991, pp. 99-105.
  363. M. Pedram. M. Marek-Sadowska and E. S. Kuh, “Floorplanning with pin assignment,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1990, pp. 98-101 (Distinguished Paper Award for ICCAD 1990).
  364. E. S. Kuh, A. Srinivasan, M. A. B. Jackson, M. Pedram. Y. Ogawa and M. Marek-Sadowska,”Timing-driven layout,”  Proc. of the Synthesis and Simulation Meeting and Int’l Interchange, Oct. 1990, pp. 263-270.
  365. M. Pedram and B. T. Preas, “Floorplanning with accurate shape constraints for the cells,”  Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Sep. 1990, pp. 332-338.
  366. M. Pedram. Y. Ogawa and E. S. Kuh, “Timing-driven placement for general cell layouts,”  Proc. of 1990 IEEE Int’l Symposium Circuits and Systems, May 1990 pp. 872-876.
  367. M. Pedram. B. T. Preas, “Interconnection length estimation for optimized standard cell layouts,”  Proc. of Int’l Conference on Computer Aided Design, Nov. 1989, pp. 390-393.
  368. M. Pedram. B. T. Preas, “Accurate prediction of physical design characteristics of random logic,” Proc. of Int’l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1989, pp. 100-108. (Best Paper Award)
  369. B. T. Preas, M. Pedram and D. Curry, “Automatic layout of Silicon-on-Silicon hybrid packages,”  Proc. of 26th Design Automation Conference, Jun. 1989, pp. 394-399.
  370. B. Eschermann, W-W. Dai, E. S. Kuh and M. Pedram. “Hierarchical placement for macrocells: a `meet-in-the-middle’ approach,”  Proc. of Int’l Conference on Computer Aided Design, pp. 390-393.
SPORT Lab © 2021