Group Project Phase #2

RTPG, RFL, Fault Simulation (DFS, PFS), Fault Coverage

Golden results

For grading, we will run a testbench only if the previous testbenches passed successfully. So if you don't pass EZ testbench successfully, we will not grade IM, HD, or NEW. The size of the problem (i.e. netlist size, number of faults, test patters, etc.) in NEW testbench is bigger than HD.

Auto test files for testbench EZ (easy) this link (25%)
Auto test files for testbench IM (intermediate) this link (25%)
Auto test files for testbench HD (hard) this link (25%)
We will also use our own NEW test cases (25%)

Grading policy

Weight of each part of phase#2 as a percentage of the total course project grade. Values are approximate and can change in the future.

LSIM2: 2%
PFS: 8%
DFS: 8%
RTPG: 1.5%
RFL: 2%
TPFC: 1.5%
Following guidelines (e.g. memory leaks and modular design): 2%
Total: 25%

Late submission penalty policy:
Only for this phase, we will apply the penalty to the specific part of the project that was submitted late.

Submission before Feb. 26th EoD: 10%
Submission before Feb. 27th EoD: 20%
Submission before Feb. 28th EoD: 30%
Submission before Feb. 29th EoD: 40%

Time limits

Time limit is quite dependent on the computing platform and its load, therefore we can't specify a specific time-limit. But here are some approximated max acceptable runtimes (for phase2) when running on the Viterbi server.

PFS test cases	Approx max runtime
c6288_pfs_tp20_f1000 c3540_pfs_tp25_f2000 c5315_pfs_tp20_f1000	(2s)
c6288_pfs_tp25_f2000 c5315_pfs_tp25_f2000	(5s)

DFS Test cases	Approx max runtime
c5315_dfs_tp10 c1908_dfs_tp25 c1908_dfs_tp20 c3540_dfs_tp20	(1s)
c5315_dfs_tp20 c5315_dfs_tp25	(2s)
c3540_dfs_tp25 c6288_dfs_tp5 c6288_dfs_tp10	(4s)
c6288_dfs_tp20	(8s)
c6288_dfs_tp25	(10s)

Important notes

Penalty for late submission is 10% per day. (more information on top of the page)
Parallel processing, i.e. using multiple threads/processors is NOT allowed.
Runtime is important as it shows the correctness of your algorithms and implementations, and not super-optimization of your code.
We will test for memory leaks, follow instructions on the README file of your repository.
The full fault dictionary for mini-circuits are available in here.

Results

Here are the preliminary results with EZ, IM, and HD testbenches. We will test your circuit with more difficult testbenches soon.
Note: RTPG, RFL, and TPFC will be graded separately.

Logic Simulation Results

Results of EZ, IM, and HD are available.

PFS Results

Results of EZ, IM, and HD are available.

DFS Results

Results of EZ, IM, and HD are available.