Alireza Shafaei

I am a fourth year Ph.D. student at the University of Southern California, where I study Computer Engineering under the supervision of Prof. Massoud Pedram. My current research focuses on energy efficient memory designs for deeply-scaled (i.e., sub-10nm) technologies.

Publications

Publications

Optimal Choice of FinFET Devices for Energy Minimization in Deeply-Scaled Technologies

Mohammad Saeed Abrishami, Alireza Shafaei, Yanzhi Wang, and Massoud Pedram
16th International Symposium on Quality Electronic Design (ISQED)
March 2015

Design Optimization of Sense Amplifiers using Deeply-scaled FinFET Devices

Alireza Shafaei, Yanzhi Wang, Antonio Petraglia, and Massoud Pedram
16th International Symposium on Quality Electronic Design (ISQED)
March 2015

A Cross-Layer Framework for Designing and Optimizing Deeply-Scaled FinFET-Based SRAM Cells under Process Variations

Alireza Shafaei, Shuang Chen, Yanzhi Wang, and Massoud Pedram
20th Asia and South Pacific Design Automation Conference (ASP-DAC)
January 2015

Low Write-Energy STT-MRAMs using FinFET-based Access Transistors

Alireza Shafaei, Yanzhi Wang, and Massoud Pedram
32nd IEEE International Conference on Computer Design (ICCD)
October 2014

A Cross-Layer Design Framework and Comparative Analysis of SRAM Cells and Cache Memories using 7nm FinFET Devices

Alireza Shafaei, Shuang Chen, Yanzhi Wang, and Massoud Pedram
IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
October 2014
Best Paper Award

FinCACTI: Architectural Analysis and Modeling of Caches with Deeply-scaled FinFET Devices

Alireza Shafaei, Yanzhi Wang, Xue Lin, and Massoud Pedram
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
July 2014

5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near- and Super-threshold Voltage Regimes

Qing Xie, Xue Lin, Yanzhi Wang, Mohammad Javad Dousti, Alireza Shafaei, Majid Ghasemi-Gol, and Massoud Pedram
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
July 2014

Cofactor Sharing for Reversible Logic Synthesis

Alireza Shafaei, Mehdi Saeedi, and Massoud Pedram
ACM Journal on Emerging Technologies in Computing Systems (JETC) Special Issue on Reversible Computation
November 2014

Squash: A Scalable Quantum Mapper Considering Ancilla Sharing

Mohammad Javad Dousti, Alireza Shafaei, and Massoud Pedram
24th Great Lakes Symposium on VLSI (GLSVLSI)
May 2014

Design of a Universal Logic Block for Fault-Tolerant Realization of any Logic Operation in Trapped-Ion Quantum Circuits

Hadi Goudarzi, Mohammad Javad Dousti, Alireza Shafaei, and Massoud Pedram
Quantum Information Processing
January 2014

Qubit Placement to Minimize Communication Overhead in 2D Quantum Architectures

Alireza Shafaei, Mehdi Saeedi, and Massoud Pedram
19th Asia and South Pacific Design Automation Conference (ASP-DAC)
January 2014

Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures

Mehdi Saeedi, Alireza Shafaei, and Massoud Pedram
5th Conference on Reversible Computation (RC)
July 2014

Optimization of Quantum Circuits for Interaction Distance in Linear Nearest Neighbor Architectures

Alireza Shafaei, Mehdi Saeedi, and Massoud Pedram
50th Design Automation Conference (DAC)
June 2013

Reversible Logic Synthesis of k-Input, m-Output Lookup Tables

Alireza Shafaei, Mehdi Saeedi, and Massoud Pedram
Design Automation and Test in Europe (DATE)
March 2013

Contact Information

Address

University of Southern California
Department of EE-Systems, EEB-214
3740 McClintock Ave.
Los Angeles, CA 90089

Email

shafaeib at usc dot edu

Office

213 740 9481